173 lines
3.4 KiB
C
173 lines
3.4 KiB
C
#include "rf24.h"
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#include "spi.h"
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#include <unistd.h>
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#include <string.h>
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#include <util/delay.h>
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#include "lcd.h"
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uint8_t rf24_buffer[33];
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uint8_t plens[]={32,12,12,12,12,12};
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uint8_t lenregs[]={RX_PW_P0,RX_PW_P1,RX_PW_P2,RX_PW_P3,RX_PW_P4,RX_PW_P5};
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uint8_t rf24_CONFIG = _BV(MASK_TX_DS)|_BV(MASK_MAX_RT);
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uint8_t rf24_status;
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uint8_t rf24_fifo;
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uint8_t rf24_addr_sl[]={ 0xE7, 0xE7, 0xE7, 0xE7, 0xE7 };
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uint8_t rf24_addr_mstr[]={ 0xC2, 0xC2, 0xC2, 0xC2, 0xC1 };
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void inline rf24_ceHi(){
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CE_PIN_PORT |= _BV(CE_PIN_BIT);
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}
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void inline rf24_ceLow(){
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CE_PIN_PORT &= ~_BV(CE_PIN_BIT);
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_delay_us(10);
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}
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void inline rf24_csnHi(){
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CSN_PIN_PORT |= _BV(CSN_PIN_BIT);
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}
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void inline rf24_csnLow(){
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CSN_PIN_PORT &= ~_BV(CSN_PIN_BIT);
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}
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void rf24_spi_transfer(uint8_t const *tx, uint8_t *rx, size_t len){
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rf24_csnLow();
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while(len--) *(rx++)=spi_transfer(*(tx++));
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rf24_csnHi();
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}
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void rf24_write_lreg(const uint8_t reg, const uint8_t * val, size_t len)
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{
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rf24_csnLow();
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spi_transfer(W_REGISTER | reg);
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while(len--) spi_transfer(*(val++));
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rf24_csnHi();
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}
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void rf24_write_reg(const uint8_t reg, const uint8_t val)
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{
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rf24_csnLow();
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spi_transfer(W_REGISTER | reg);
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spi_transfer(val);
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rf24_csnHi();
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}
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uint8_t rf24_read_reg(const uint8_t reg)
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{
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rf24_csnLow();
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spi_transfer(R_REGISTER | reg);
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uint8_t ret = spi_transfer(0);
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rf24_csnHi();
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return ret;
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}
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void rf24_update_fifo_status()
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{
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rf24_csnLow();
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rf24_status = spi_transfer(FIFO_STATUS);
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rf24_fifo = spi_transfer(0);
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rf24_csnHi();
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}
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void rf24_setup()
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{
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CE_PIN_DDR |= _BV(CE_PIN_BIT);
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CSN_PIN_DDR |= _BV(CSN_PIN_BIT);
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rf24_ceLow();
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rf24_csnHi();
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}
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void rf24_init()
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{
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rf24_write_reg(CONFIG,rf24_CONFIG);
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rf24_write_reg(EN_AA,0);
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rf24_write_reg(EN_RXADDR,_BV(ERX_P0));
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rf24_write_reg(SETUP_AW,0x03);
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rf24_write_reg(SETUP_RETR,0x00);
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rf24_write_reg(RF_CH,90);
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rf24_write_reg(RF_SETUP,_BV(RF_DR_LOW)|_BV(RF_PWR_HIGH)|_BV(RF_PWR_LOW));
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rf24_write_lreg(RX_ADDR_P0,rf24_addr_sl,5);
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rf24_write_lreg(TX_ADDR,rf24_addr_mstr,5);
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rf24_write_reg(RX_PW_P0,plens[0]);
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rf24_write_reg(DYNPD,0);
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rf24_write_reg(FEATURE,0);
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}
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/*
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void rf24_Off()
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{
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rf24_write_reg(CONFIG,rf24_CONFIG&0xF8);
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}
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void rf24_RXMode()
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{
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rf24_Off();
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_delay_us(1000);
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rf24_buffer[0]=FLUSH_RX;
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spi_transfer_rf24(rf24_buffer,rf24_buffer,1);
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rf24_write_reg(CONFIG,rf24_CONFIG|0x03);
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}
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void rf24_TXMode()
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{
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rf24_Off();
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_delay_us(1000);
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rf24_buffer[0]=FLUSH_TX;
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spi_transfer_rf24(rf24_buffer,rf24_buffer,1);
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rf24_write_reg(CONFIG,rf24_CONFIG|0x02);
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_delay_us(1000);
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}
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int rf24_receive(uint8_t * buffer)
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{
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rf24_update_fifo_status();
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if(rf24_fifo&1) return 0;
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int pipe = (rf24_status & 0x0E) >> 1;
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if(pipe==7) return 0;
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int len = plens[pipe];
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rf24_buffer[0]= R_RX_PAYLOAD;
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spi_transfer_rf24(rf24_buffer,rf24_buffer,len+1);
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memcpy ( buffer, rf24_buffer+1,len);
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return len;
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}
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int rf24_send(uint8_t * buffer, int len){
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if (len> 32 ) return -1;
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int cpt=20000;
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rf24_update_fifo_status();
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while((cpt--)&&(rf24_fifo & 0x20)){
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_delay_us(1);
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rf24_update_fifo_status();
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}
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if(cpt==0 && (rf24_fifo & 0x20)) return 0;
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memcpy(rf24_buffer+1,buffer,len);
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rf24_buffer[0]=W_TX_PAYLOAD;
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spi_transfer_rf24(rf24_buffer,rf24_buffer,plens[0]);
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return plens[0];
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}
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int rf24_waitforTX()
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{
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int cpt=2000;
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rf24_update_fifo_status();
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while((cpt--)&&!(rf24_fifo & 0x10)){
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_delay_us(1);
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rf24_update_fifo_status();
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}
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return cpt==0;
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}
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*/
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